NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems

We implemented the NaNet FPGA-based PCI2 Gen2 GbE/APElink NIC, featuring GPUDirect RDMA capabilities and UDP protocol management offloading. NaNet is able to receive a UDP input data stream from its GbE interface and redirect it, without any intermediate buffering or CPU intervention, to the memory...

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Detalles Bibliográficos
Autores principales: Ammendola, Roberto, Biagioni, Andrea, Fantechi, Riccardo, Frezza, Ottorino, Lamanna, Gianluca, Lo Cicero, Francesca, Lonardo, Alessandro, Paolucci, Pier Stanislao, Pantaleo, Felice, Piandani, Roberto, Pontisso, Luca, Rossetti, Davide, Simula, Francesco, Sozzi, Marco, Tosoratto, Laura, Vicini, Piero
Lenguaje:eng
Publicado: 2013
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1742-6596/513/1/012018
http://cds.cern.ch/record/1624541

Internet

https://dx.doi.org/10.1088/1742-6596/513/1/012018
http://cds.cern.ch/record/1624541

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