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Designing 2D and 3D network-on-chip architectures

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect.  It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools.  Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms,...

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Detalles Bibliográficos
Autores principales: Tatas, Konstantinos, Siozios, Kostas, Soudris, Dimitrios, Jantsch, Axel
Lenguaje:eng
Publicado: Springer 2014
Materias:
Acceso en línea:https://dx.doi.org/10.1007/978-1-4614-4274-5
http://cds.cern.ch/record/1627006