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Nano-scale CMOS analog circuits: models and CAD techniques for high-level design
Reliability concerns and the limitations of process technology can sometimes restrict the innovation process involved in designing nano-scale analog circuits. The success of nano-scale analog circuit design requires repeat experimentation, correct analysis of the device physics, process technology,...
| Autores principales: | , , |
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| Lenguaje: | eng |
| Publicado: |
Taylor and Francis
2014
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| Acceso en línea: | http://cds.cern.ch/record/1668261 |