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SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades

We present the results of the characterization of pixel modules composed of 75 μm thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding proces...

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Autores principales: Macchiolo, A., Andricek, L., Moser, H.G., Nisius, R., Richter, R.H., Weigell, P.
Formato: info:eu-repo/semantics/article
Lenguaje:eng
Publicado: Phys. Procedia 2012
Materias:
Acceso en línea:https://dx.doi.org/10.1016/j.phpro.2012.02.444
http://cds.cern.ch/record/1694330
_version_ 1780935963298496512
author Macchiolo, A.
Andricek, L.
Moser, H.G.
Nisius, R.
Richter, R.H.
Weigell, P.
author_facet Macchiolo, A.
Andricek, L.
Moser, H.G.
Nisius, R.
Richter, R.H.
Weigell, P.
author_sort Macchiolo, A.
collection CERN
description We present the results of the characterization of pixel modules composed of 75 μm thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented.
format info:eu-repo/semantics/article
id cern-1694330
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2012
publisher Phys. Procedia
record_format invenio
spelling cern-16943302022-08-10T20:51:13Z doi:10.1016/j.phpro.2012.02.444 http://cds.cern.ch/record/1694330 eng Macchiolo, A. Andricek, L. Moser, H.G. Nisius, R. Richter, R.H. Weigell, P. SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades Detectors and Experimental Techniques 3: Microelectronics and interconnection technology 3.2: 3D Interconnection Detectors and Experimental Techniques We present the results of the characterization of pixel modules composed of 75 μm thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented. We present the results of the characterization of pixel modules composed of 75 um thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented. We present the results of the characterization of pixel modules composed of 75 μm thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented. info:eu-repo/grantAgreement/EC/FP7/262025 info:eu-repo/semantics/openAccess Education Level info:eu-repo/semantics/article http://cds.cern.ch/record/1694330 Phys. Procedia Phys. Procedia, (2012) pp. 1009-1015 2012-03-01
spellingShingle Detectors and Experimental Techniques
3: Microelectronics and interconnection technology
3.2: 3D Interconnection
Detectors and Experimental Techniques
Macchiolo, A.
Andricek, L.
Moser, H.G.
Nisius, R.
Richter, R.H.
Weigell, P.
SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
title SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
title_full SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
title_fullStr SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
title_full_unstemmed SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
title_short SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
title_sort slid-icv vertical integration technology for the atlas pixel upgrades
topic Detectors and Experimental Techniques
3: Microelectronics and interconnection technology
3.2: 3D Interconnection
Detectors and Experimental Techniques
url https://dx.doi.org/10.1016/j.phpro.2012.02.444
http://cds.cern.ch/record/1694330
http://cds.cern.ch/record/1694330
work_keys_str_mv AT macchioloa slidicvverticalintegrationtechnologyfortheatlaspixelupgrades
AT andricekl slidicvverticalintegrationtechnologyfortheatlaspixelupgrades
AT moserhg slidicvverticalintegrationtechnologyfortheatlaspixelupgrades
AT nisiusr slidicvverticalintegrationtechnologyfortheatlaspixelupgrades
AT richterrh slidicvverticalintegrationtechnologyfortheatlaspixelupgrades
AT weigellp slidicvverticalintegrationtechnologyfortheatlaspixelupgrades