The hardware implementation of the CERN SPS ultrafast feedback processor demonstrator

An ultrafast 4GSa/s transverse feedback processor has been developed for proof-of-concept studies of feedback control of e-cloud driven and transverse mode coupled intra-bunch instabilities in the CERN SPS. This system consists of a high-speed ADC on the front end and equally fast DAC on the ba...

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Detalles Bibliográficos
Autores principales: Dusakto, J E, Cesaratto, J M, Fox, J D, Olsen, J, Rivetta, C H, Höfle, W
Lenguaje:eng
Publicado: 2013
Materias:
Accelerators and Storage Rings
Acceso en línea:http://cds.cern.ch/record/1743024

Internet

http://cds.cern.ch/record/1743024

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