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Hybrid fault tolerance techniques to detect transient faults in embedded processors
This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive disc...
Autores principales: | , , |
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Lenguaje: | eng |
Publicado: |
Springer
2014
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1007/978-3-319-06340-9 http://cds.cern.ch/record/1747988 |