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Radiation hard programmable delay line for LHCb calorimeter upgrade
This paper describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) in order to shift the phase of the LHC clock (25 ns) in steps of 1ns, with less than 5 ps jitter and 23 ps of DNL. The delay lines will be integrated into ICECAL, the LHCb calorimeter fr...
| Hauptverfasser: | , , , , , , , |
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| Sprache: | eng |
| Veröffentlicht: |
2014
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| Schlagworte: | |
| Online Zugang: | https://dx.doi.org/10.1088/1748-0221/9/01/C01016 http://cds.cern.ch/record/1951407 |