Test results of the first 3D-IC prototype chip developed in the framework of HL-LHC/ATLAS hybrid pixel upgrade

To face new challenges brought by the upgrades of the Large Hadron Collider at CERN and of the ATLAS pixels detector, for which high spatial resolution, very good signal to noise ratio and high radiation hardness is needed, 3D integrated technologies are investigated. In the years to come, the Large Hadron Collider will be upgraded to Higher Luminosity (HL-LHC). The ATLAS pixel detector needs to handle this new challenging environment. As a consequence, 3D integrated technologies are pursued with the target of offering higher spatial resolution, very good signal to noise ratio and unprecedented radiation hardness. We present here the test results of the first 3D prototype chip developed in the GlobalFoundries 130 nm technology processed by the Tezzaron Company, submitted within the 3D-IC consortium for which a qualification program was developed. Reliability and influence on the behavior of the integrated devices due to the presence of the Bond Interface (BI) and of the Through Silicon Via (TSV) connections, both needed for the 3D integration process, have also been addressed by the tests.