A 10MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65m CMOS

The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. To avoid the need for a...

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Detalles Bibliográficos
Autores principales: Kishishita, T, Hemperek, T, Krüger, H, Koch, M, Germic, L, Wermes, N
Formato: info:eu-repo/semantics/article
Lenguaje:eng
Publicado: Nucl. Instrum. Methods Phys. Res., A 2013
Materias:
Detectors and Experimental Techniques
3: Microelectronics and interconnection technology
3.3: Shareable IP Blocks for HEP
Acceso en línea:http://cds.cern.ch/record/1997610

Internet

http://cds.cern.ch/record/1997610

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