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Results of FE65-P2 Pixel Readout Test Chip for High Luminosity LHC Upgrades
A pixel readout test chip called FE65-P2 has been fabricated on 65 nm CMOS technology. FE65-P2 contains a matrix of 64 x 64 pixels on 50 micron by 50 micron pitch, designed to read out a bump bonded sensor. The goals of FE65-P2 are to demonstrate excellent analog performance isolated from digital ac...
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| Lenguaje: | eng |
| Publicado: |
2016
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| Acceso en línea: | https://dx.doi.org/10.22323/1.282.0272 http://cds.cern.ch/record/2231609 |