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Test generation of crosstalk delay faults in VLSI circuits

Detalles Bibliográficos
Autores principales: Jayanthy, S, Bhuvaneswari, M C
Lenguaje:eng
Publicado: Springer 2018
Materias:
Acceso en línea:http://cds.cern.ch/record/2710614
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author Jayanthy, S
Bhuvaneswari, M C
author_facet Jayanthy, S
Bhuvaneswari, M C
author_sort Jayanthy, S
collection CERN
id cern-2710614
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2018
publisher Springer
record_format invenio
spelling cern-27106142021-04-21T18:10:23Zhttp://cds.cern.ch/record/2710614engJayanthy, SBhuvaneswari, M CTest generation of crosstalk delay faults in VLSI circuitsEngineeringSpringeroai:cds.cern.ch:27106142018
spellingShingle Engineering
Jayanthy, S
Bhuvaneswari, M C
Test generation of crosstalk delay faults in VLSI circuits
title Test generation of crosstalk delay faults in VLSI circuits
title_full Test generation of crosstalk delay faults in VLSI circuits
title_fullStr Test generation of crosstalk delay faults in VLSI circuits
title_full_unstemmed Test generation of crosstalk delay faults in VLSI circuits
title_short Test generation of crosstalk delay faults in VLSI circuits
title_sort test generation of crosstalk delay faults in vlsi circuits
topic Engineering
url http://cds.cern.ch/record/2710614
work_keys_str_mv AT jayanthys testgenerationofcrosstalkdelayfaultsinvlsicircuits
AT bhuvaneswarimc testgenerationofcrosstalkdelayfaultsinvlsicircuits