Compressing deep neural networks on FPGAs to binary and ternary precision with HLS4ML

We present the implementation of binary and ternary neural networks in the hls4ml library, designed to automatically convert deep neural network models to digital circuits with FPGA firmware. Starting from benchmark models trained with floating point precision, we investigate different strategies to...

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Detalles Bibliográficos
Autores principales: Loncar, Vladimir, Ngadiuba, Jennifer, Duarte, Javier, Harris, Philip, Hoang, Duc, Pedro, Kevin, Pierini, Maurizio, Rankin, Dylan, Sagear, Sheila, Summers, Sioni, Tran, Nhan, Jindariani, Sergo, Wu, Zhenbin, Liu, Mia, Di Guglielmo, Giuseppe, Kreinar, Edward
Lenguaje:eng
Publicado: 2021
Materias:
hep-ex
Particle Physics - Experiment
eess.SP
cs.LG
Computing and Computers
Acceso en línea:https://dx.doi.org/10.1088/2632-2153/aba042
http://cds.cern.ch/record/2715322

Internet

https://dx.doi.org/10.1088/2632-2153/aba042
http://cds.cern.ch/record/2715322

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