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Convolutional Layer Implementations in High-Level Synthesis for FPGAs
Field programmable gate arrays (FPGAs) offer a flexible hardware platform on which machine learning algorithms can be efficiently implemented. However, developing these algorithms on FPGAs can be prohibitive due to complex implementation details. We use the HLS4ML (High-Level Synthesis for Machine L...
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| Lenguaje: | eng |
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2021
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| Acceso en línea: | http://cds.cern.ch/record/2776765 |