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Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS
This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to SingleEvent Effects (SE...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2021
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.3390/electronics10222741 http://cds.cern.ch/record/2807905 |