Configuration Memory Scrubbing of SRAM-Based FPGAs Using a Mixed 2-D Coding Technique

SRAM-based field-programmable gate array (FPGA) vendors typically integrate error correction codes (ECCs) into the configuration memory to assist designers in implementing scrubbing mechanisms. In most cases, these ECC schemes guarantee the correction of single- and double-bit errors per configurati...

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Detalles Bibliográficos
Autores principales: Vlagkoulis, Vasileios, Sari, Aitzan, Antonopoulos, Georgios, Psarakis, Mihalis, Tavoularis, Antonios, Furano, Gianluca, Boatella-Polo, Cesar, Poivey, Christian, Ferlet-Cavrois, Véronique, Kastriotou, Maria, Martinez, Pablo Fernandez, Alía, Rubén García
Lenguaje:eng
Publicado: 2022
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1109/TNS.2022.3151977
http://cds.cern.ch/record/2807909

Internet

https://dx.doi.org/10.1109/TNS.2022.3151977
http://cds.cern.ch/record/2807909

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