Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing...

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Detalles Bibliográficos
Autores principales: Snoeys, W, Faccio, F, Burns, M, Campbell, M, Cantatore, E, Carrer, N, Casagrande, L, Cavagnoli, A, Dachs, C, Di Liberto, S, Formenti, F, Giraldo, A, Heijne, Erik H M, Jarron, Pierre, Letheren, M F, Marchioro, A, Martinengo, P, Meddi, F, Mikulec, B, Morando, M, Morel, M, Noah, E, Paccagnella, A, Ropotar, I, Saladino, S, Sansen, Willy, Santopietro, F, Scarlassara, F, Segato, G F, Signe, P M, Soramel, F, Vannucci, Luigi, Vleugels, K
Lenguaje:eng
Publicado: 2000
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1016/S0168-9002(99)00899-2
http://cds.cern.ch/record/427347

Internet

https://dx.doi.org/10.1016/S0168-9002(99)00899-2
http://cds.cern.ch/record/427347

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