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Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing...

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Detalles Bibliográficos
Autores principales: Snoeys, W, Faccio, F, Burns, M, Campbell, M, Cantatore, E, Carrer, N, Casagrande, L, Cavagnoli, A, Dachs, C, Di Liberto, S, Formenti, F, Giraldo, A, Heijne, Erik H M, Jarron, Pierre, Letheren, M F, Marchioro, A, Martinengo, P, Meddi, F, Mikulec, B, Morando, M, Morel, M, Noah, E, Paccagnella, A, Ropotar, I, Saladino, S, Sansen, Willy, Santopietro, F, Scarlassara, F, Segato, G F, Signe, P M, Soramel, F, Vannucci, Luigi, Vleugels, K
Lenguaje:eng
Publicado: 2000
Materias:
Acceso en línea:https://dx.doi.org/10.1016/S0168-9002(99)00899-2
http://cds.cern.ch/record/427347
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author Snoeys, W
Faccio, F
Burns, M
Campbell, M
Cantatore, E
Carrer, N
Casagrande, L
Cavagnoli, A
Dachs, C
Di Liberto, S
Formenti, F
Giraldo, A
Heijne, Erik H M
Jarron, Pierre
Letheren, M F
Marchioro, A
Martinengo, P
Meddi, F
Mikulec, B
Morando, M
Morel, M
Noah, E
Paccagnella, A
Ropotar, I
Saladino, S
Sansen, Willy
Santopietro, F
Scarlassara, F
Segato, G F
Signe, P M
Soramel, F
Vannucci, Luigi
Vleugels, K
author_facet Snoeys, W
Faccio, F
Burns, M
Campbell, M
Cantatore, E
Carrer, N
Casagrande, L
Cavagnoli, A
Dachs, C
Di Liberto, S
Formenti, F
Giraldo, A
Heijne, Erik H M
Jarron, Pierre
Letheren, M F
Marchioro, A
Martinengo, P
Meddi, F
Mikulec, B
Morando, M
Morel, M
Noah, E
Paccagnella, A
Ropotar, I
Saladino, S
Sansen, Willy
Santopietro, F
Scarlassara, F
Segato, G F
Signe, P M
Soramel, F
Vannucci, Luigi
Vleugels, K
author_sort Snoeys, W
collection CERN
description A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).
id cern-427347
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2000
record_format invenio
spelling cern-4273472019-09-30T06:29:59Zdoi:10.1016/S0168-9002(99)00899-2http://cds.cern.ch/record/427347engSnoeys, WFaccio, FBurns, MCampbell, MCantatore, ECarrer, NCasagrande, LCavagnoli, ADachs, CDi Liberto, SFormenti, FGiraldo, AHeijne, Erik H MJarron, PierreLetheren, M FMarchioro, AMartinengo, PMeddi, FMikulec, BMorando, MMorel, MNoah, EPaccagnella, ARopotar, ISaladino, SSansen, WillySantopietro, FScarlassara, FSegato, G FSigne, P MSoramel, FVannucci, LuigiVleugels, KLayout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chipDetectors and Experimental TechniquesA new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).oai:cds.cern.ch:4273472000
spellingShingle Detectors and Experimental Techniques
Snoeys, W
Faccio, F
Burns, M
Campbell, M
Cantatore, E
Carrer, N
Casagrande, L
Cavagnoli, A
Dachs, C
Di Liberto, S
Formenti, F
Giraldo, A
Heijne, Erik H M
Jarron, Pierre
Letheren, M F
Marchioro, A
Martinengo, P
Meddi, F
Mikulec, B
Morando, M
Morel, M
Noah, E
Paccagnella, A
Ropotar, I
Saladino, S
Sansen, Willy
Santopietro, F
Scarlassara, F
Segato, G F
Signe, P M
Soramel, F
Vannucci, Luigi
Vleugels, K
Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
title Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
title_full Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
title_fullStr Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
title_full_unstemmed Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
title_short Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
title_sort layout techniques to enhance the radiation tolerance of standard cmos technologies demonstrated on a pixel detector readout chip
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1016/S0168-9002(99)00899-2
http://cds.cern.ch/record/427347
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