Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: practical design aspects

We discuss design issues related to the extensive use of Enclosed Layout Transistors (ELT's) and guard rings in deep submicron CMOS technologies in order to improve radiation tolerance of ASIC's designed for the LHC experiments (the Large Hadron Collider at present under construction at CE...

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Detalles Bibliográficos
Autores principales: Anelli, G, Campbell, M, Delmastro, M, Faccio, F, Floria, S, Giraldo, A, Heijne, Erik H M, Jarron, Pierre, Kloukinas, Kostas C, Marchioro, A, Moreira, P, Snoeys, W
Lenguaje:eng
Publicado: 1999
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1109/23.819140
http://cds.cern.ch/record/428128

Internet

https://dx.doi.org/10.1109/23.819140
http://cds.cern.ch/record/428128

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