Cargando…
Noise characterization of a 0.25 $\mu$ m CMOS technology for the LHC experiments
After having reviewed the main noise sources in an MOS transistor the paper presents results about the noise performance of a 0.25 mu m CMOS technology which is being extensively used to design radiation tolerant ASICs for the LHC experiments (the Large Hadron Collider at present under construction...
Autores principales: | Anelli, G, Faccio, F, Florian, S, Jarron, Pierre |
---|---|
Lenguaje: | eng |
Publicado: |
2001
|
Materias: | |
Acceso en línea: | https://dx.doi.org/10.1016/S0168-9002(00)00761-0 http://cds.cern.ch/record/503755 |
Ejemplares similares
-
Total dose and single event effects (SEE) in a $0.25-\mu-m$ CMOS technology
por: Faccio, F, et al.
Publicado: (1999) -
A mixed-signal ASIC for the silicon drift detectors of the ALICE experiment in a $0.25\mu m$ CMOS
por: Rivetti, A, et al.
Publicado: (2000) -
A pixel readout chip for 10-30 MRad in standard 0.25 mu m CMOS
por: Campbell, M, et al.
Publicado: (1999) -
Single event effects in static and dynamic registers in a $0.25-\mu-m$ CMOS technology
por: Faccio, F, et al.
Publicado: (1999) -
Design of a comparator in a 0.25 $\mu m$ CMOS technology
por: Van Bakel, N, et al.
Publicado: (2000)