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A flexible multi-channel high-resolution time-to-digital converter ASIC
A data driven multi-channel Time-to-Digital Converter (TDC) circuit with programmable resolution ( similar to 25ps - 8OOps binning) and a dynamic range of 102.4mus has been implemented in a 0.25mum CMOS technology. An on-chip PLL is used for clock multiplication up to 320MHz from an external 40MHz r...
Autores principales: | , , , , , |
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Lenguaje: | eng |
Publicado: |
2000
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/560387 |