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Readout Logic and Its Hardware Implementation in the DIRAC Experiment
Readout logic and architecture of the readout hardware of the experiment DIRAC at CERN are described. The data collection system is configured from dedicated and commercial readout branches running in a parallel hardware-controlled mode. Readout process is controlled by trigger processors which may...
Autores principales: | , , , |
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Lenguaje: | eng |
Publicado: |
2003
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/621739 |