Cargando…
An alternative architecture of the L0(æ) processor
97-024 An alternative architecture of the L0(µ) processor and its implementation are presented. The architecture of the processor is based on a strong zeroÂsuppression in order to minimize the data flow coming from the muon detector. It can be achieved by the fast identification of the muon tracks...
| Autores principales: | , , , , |
|---|---|
| Lenguaje: | eng |
| Publicado: |
1997
|
| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/684484 |