Cargando…
Hight-Speed, Parallel, Pipelined, Processor Architecture for front-end Electronics, and Method of Use Thereof
other imaging techniques,
| Autor principal: | |
|---|---|
| Lenguaje: | eng |
| Publicado: |
1996
|
| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/691678 |