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CARIOCA - a fast binary front-end implemented in 0.25 $\mu$m CMOS using a Novel current-mode technique for the LHCb muon detector
The CARIOCA front-end is an amplifier discriminator chip, using 0.25mm CMOS technology, developed with a very fast and low noise preamplifier. This prototype was designed to have input impedance below 10W. Measurements showed a peaking time of 14ns and noise of 450e- at zero input capacitance, with...
Autores principales: | , , , , , , |
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Lenguaje: | eng |
Publicado: |
2000
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/691762 |