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ATLAS calibration delay chip study
The delay chip is an ASIC developed to precisely adjust signals within the range of 0-24ns in steps of 1ns. In this note, we report the study of the characteristics of this chip like the linearity and the jitter. We describe the influence of temperature and supply voltage on its behavior. Finally, w...
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| Lenguaje: | eng |
| Publicado: |
2003
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| Acceso en línea: | http://cds.cern.ch/record/709445 |