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A 013-mum CMOS serializer for data and trigger optical links in particle physics experiments
A 3.2-Gbit/s serializer prototype has been fabricated in a 0.13-mum CMOS technology to demonstrate its applicability within future Large Hadron Collider (LHC) data readout and trigger systems. The IC includes a clock-multiplying phase-locked-loop (PLL), a 50-Omega line driver, internal self-testing...
Autores principales: | , , |
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Lenguaje: | eng |
Publicado: |
2004
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1109/TNS.2004.829551 http://cds.cern.ch/record/816802 |