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BDC 500 branch driver controller
This processor has been designed for very fast data acquisition and date pre-processing. The dataway and branch highway speeds have been optimized for approximately 1.5 mu sec. The internal processor cycle is approximately 0.8 mu sec. The standard version contains the following functions (slots): cr...
Autores principales: | , |
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Lenguaje: | eng |
Publicado: |
CERN
1981
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.5170/CERN-1981-007.418 http://cds.cern.ch/record/878044 |
_version_ | 1780907929431441408 |
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author | Dijksman, A Schöps, W |
author_facet | Dijksman, A Schöps, W |
author_sort | Dijksman, A |
collection | CERN |
description | This processor has been designed for very fast data acquisition and date pre-processing. The dataway and branch highway speeds have been optimized for approximately 1.5 mu sec. The internal processor cycle is approximately 0.8 mu sec. The standard version contains the following functions (slots): crate controller type A1; branch highway driver including terminator; serial I/O port (TTY, VDU); 24 bit ALU and 24 bit program counter; 16 bit memory address counter and 4 word stack; 4k bit memory for program and/or data; battery backup for the memory; CNAFD and crate LAM display; request/grant logic for time- sharing operation of several BDCs. The free slots can be equipped with e.g. extra RAM, computer interfaces, hardware multiplier/dividers, etc. (0 refs). |
id | cern-878044 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 1981 |
publisher | CERN |
record_format | invenio |
spelling | cern-8780442019-09-30T06:29:59Zdoi:10.5170/CERN-1981-007.418http://cds.cern.ch/record/878044engDijksman, ASchöps, WBDC 500 branch driver controllerNuclear PhysicsThis processor has been designed for very fast data acquisition and date pre-processing. The dataway and branch highway speeds have been optimized for approximately 1.5 mu sec. The internal processor cycle is approximately 0.8 mu sec. The standard version contains the following functions (slots): crate controller type A1; branch highway driver including terminator; serial I/O port (TTY, VDU); 24 bit ALU and 24 bit program counter; 16 bit memory address counter and 4 word stack; 4k bit memory for program and/or data; battery backup for the memory; CNAFD and crate LAM display; request/grant logic for time- sharing operation of several BDCs. The free slots can be equipped with e.g. extra RAM, computer interfaces, hardware multiplier/dividers, etc. (0 refs).CERNoai:cds.cern.ch:8780441981 |
spellingShingle | Nuclear Physics Dijksman, A Schöps, W BDC 500 branch driver controller |
title | BDC 500 branch driver controller |
title_full | BDC 500 branch driver controller |
title_fullStr | BDC 500 branch driver controller |
title_full_unstemmed | BDC 500 branch driver controller |
title_short | BDC 500 branch driver controller |
title_sort | bdc 500 branch driver controller |
topic | Nuclear Physics |
url | https://dx.doi.org/10.5170/CERN-1981-007.418 http://cds.cern.ch/record/878044 |
work_keys_str_mv | AT dijksmana bdc500branchdrivercontroller AT schopsw bdc500branchdrivercontroller |