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A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
A 3.2 Gbit/s serializer prototype has been fabricated in a 0.13 mum CMOS technology to demonstrate its applicability within future LHC data readout and trigger systems. The IC includes a clock-multiplying Phase-Locked-Loop (PLL), a 50 Omega line driver, internal self- testing features and data patte...
| Autores principales: | , , |
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| Lenguaje: | eng |
| Publicado: |
2003
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/908909 |