A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments

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A 3.2 Gbit/s serializer prototype has been fabricated in a 0.13 mum CMOS technology to demonstrate its applicability within future LHC data readout and trigger systems. The IC includes a clock-multiplying Phase-Locked-Loop (PLL), a 50 Omega line driver, internal self- testing features and data patte...

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Detalles Bibliográficos
Autores principales: Cervelli, Giovanni, Marchioro, Alessandro, Moreira, Paulo
Lenguaje:eng
Publicado: 2003
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/908909
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author Cervelli, Giovanni
Marchioro, Alessandro
Moreira, Paulo
author_facet Cervelli, Giovanni
Marchioro, Alessandro
Moreira, Paulo
author_sort Cervelli, Giovanni
collection CERN
description A 3.2 Gbit/s serializer prototype has been fabricated in a 0.13 mum CMOS technology to demonstrate its applicability within future LHC data readout and trigger systems. The IC includes a clock-multiplying Phase-Locked-Loop (PLL), a 50 Omega line driver, internal self- testing features and data pattern generation. The serial output stream is 8B/10B encoded for compatibility with commercial receivers. Radiation hardening layout techniques have been adopted, which guarantee radiation tolerant operation inside the innermost LHC detectors over more than 10 years. This work describes the circuit architecture and reports on the experimental results. Signal quality (jitter, noise floor, eye opening) and Bit-Error-Rate (BER) are measured at different transmission rates using laboratory instrumentation and dedicated test-beds.
id cern-908909
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2003
record_format invenio
spelling cern-9089092019-09-30T06:29:59Zhttp://cds.cern.ch/record/908909engCervelli, GiovanniMarchioro, AlessandroMoreira, PauloA 0.13 mum CMOS serializer for data and trigger optical links in particle physics experimentsDetectors and Experimental TechniquesA 3.2 Gbit/s serializer prototype has been fabricated in a 0.13 mum CMOS technology to demonstrate its applicability within future LHC data readout and trigger systems. The IC includes a clock-multiplying Phase-Locked-Loop (PLL), a 50 Omega line driver, internal self- testing features and data pattern generation. The serial output stream is 8B/10B encoded for compatibility with commercial receivers. Radiation hardening layout techniques have been adopted, which guarantee radiation tolerant operation inside the innermost LHC detectors over more than 10 years. This work describes the circuit architecture and reports on the experimental results. Signal quality (jitter, noise floor, eye opening) and Bit-Error-Rate (BER) are measured at different transmission rates using laboratory instrumentation and dedicated test-beds.oai:cds.cern.ch:9089092003
spellingShingle Detectors and Experimental Techniques
Cervelli, Giovanni
Marchioro, Alessandro
Moreira, Paulo
A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
title A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
title_full A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
title_fullStr A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
title_full_unstemmed A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
title_short A 0.13 mum CMOS serializer for data and trigger optical links in particle physics experiments
title_sort 0.13 mum cmos serializer for data and trigger optical links in particle physics experiments
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/908909
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AT cervelligiovanni 013mumcmosserializerfordataandtriggeropticallinksinparticlephysicsexperiments
AT marchioroalessandro 013mumcmosserializerfordataandtriggeropticallinksinparticlephysicsexperiments
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