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Implementation of a PC-based Level 0 Trigger Processor for the NA62 Experiment
Lowest level (sometimes called Level 0, L0) triggers are fundamental components in high energy physics experiments, and yet they are quite often custom-made. Even when using FPGAs to achieve better flexibility in modifying and maintaining, small changes require hardware reconfiguration and changes t...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2014
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1742-6596/513/1/012008 http://cds.cern.ch/record/2026294 |