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Design of low-power, low-voltage, differential I/O links for High Energy Physics applications
This work presents the design of a low-power, differential signaling, input/output data link in a 65 nm CMOS process for high energy physics (HEP) experiments. The proposed driver, able to operate at 320 Mbps or 640 Mbps with a normalized power dissipation of 3.125 mW/Gbps, is meant to drive short d...
Autores principales: | , , , , , , , |
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Lenguaje: | eng |
Publicado: |
2015
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/10/01/C01055 http://cds.cern.ch/record/2158929 |