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Low-power clock distribution circuits for the Macro Pixel ASIC
Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the HL-LHC. This work reviews different CMOS circuit architectur...
| Autores principales: | , , , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2015
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/10/01/C01051 http://cds.cern.ch/record/2158930 |