A synchronous analog very front-end in 65 nm CMOS with local fast ToT encoding for pixel detectors at HL-LHC

This work describes the design, in 65 nm CMOS, of a very compact, low power, low threshold synchronous analog front-end for pixel detectors at HL-LHC . Threshold trimming is avoided using offset compensation techniques. Fast ToT encoding is possible, as the comparator can be turned into a Local Osci...

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Detalles Bibliográficos
Autores principales: Monteil, Ennio, Pacher, L, Paternò, A, Demaria, N, Rivetti, A, Da Rocha Rolo, M, Rotondo, F, Leng, C, Chai, J
Lenguaje:eng
Publicado: 2017
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/12/03/C03066
http://cds.cern.ch/record/2291599

Internet

https://dx.doi.org/10.1088/1748-0221/12/03/C03066
http://cds.cern.ch/record/2291599

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