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FPGA based data processing in the ALICE High Level Trigger in LHC Run 2
The ALICE High Level Trigger (HLT) is a computing cluster dedicated to the online compression, reconstruction and calibration of experimental data. The HLT receives detector data via serial optical links into FPGA based readout boards that process the data on a per-link level already inside the FPGA...
| Autores principales: | , , |
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| Lenguaje: | eng |
| Publicado: |
2017
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1742-6596/898/3/032018 http://cds.cern.ch/record/2298185 |