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Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs
Single event radiation effects represent one of the main challenges for digital designs exposed to ionizing particles in high energy physics detectors. Radiation hardening techniques are based on redundancy, leading to a significant increase in power consumption and area overhead. This contribution...
Autores principales: | , , , , , , |
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Lenguaje: | eng |
Publicado: |
SISSA
2020
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.22323/1.370.0015 http://cds.cern.ch/record/2724952 |
_version_ | 1780966020019650560 |
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author | Caratelli, Alessandro Scarfi, Simone Bergamin, Gianmario Ceresa, Davide Clerq, Jarne De Kloukinas, Kostas Leblebici, Yusuf |
author_facet | Caratelli, Alessandro Scarfi, Simone Bergamin, Gianmario Ceresa, Davide Clerq, Jarne De Kloukinas, Kostas Leblebici, Yusuf |
author_sort | Caratelli, Alessandro |
collection | CERN |
description | Single event radiation effects represent one of the main challenges for digital designs exposed to ionizing particles in high energy physics detectors. Radiation hardening techniques are based on redundancy, leading to a significant increase in power consumption and area overhead. This contribution will present the single event effects hardening techniques adopted in the pixel and strip readout ASICs of the PS modules for the CMS outer tracker upgrade in relation to power requirements and error rates. Cross section measurements on the silicon prototypes and expected error rates evaluated for the CMS tracker particle flux and spectrum will be presented. |
id | oai-inspirehep.net-1792903 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2020 |
publisher | SISSA |
record_format | invenio |
spelling | oai-inspirehep.net-17929032020-07-25T21:15:59Zdoi:10.22323/1.370.0015http://cds.cern.ch/record/2724952engCaratelli, AlessandroScarfi, SimoneBergamin, GianmarioCeresa, DavideClerq, Jarne DeKloukinas, KostasLeblebici, YusufLow-power SEE hardening techniques and error rate evaluation in 65nm readout ASICsDetectors and Experimental TechniquesSingle event radiation effects represent one of the main challenges for digital designs exposed to ionizing particles in high energy physics detectors. Radiation hardening techniques are based on redundancy, leading to a significant increase in power consumption and area overhead. This contribution will present the single event effects hardening techniques adopted in the pixel and strip readout ASICs of the PS modules for the CMS outer tracker upgrade in relation to power requirements and error rates. Cross section measurements on the silicon prototypes and expected error rates evaluated for the CMS tracker particle flux and spectrum will be presented.SISSAoai:inspirehep.net:17929032020 |
spellingShingle | Detectors and Experimental Techniques Caratelli, Alessandro Scarfi, Simone Bergamin, Gianmario Ceresa, Davide Clerq, Jarne De Kloukinas, Kostas Leblebici, Yusuf Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs |
title | Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs |
title_full | Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs |
title_fullStr | Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs |
title_full_unstemmed | Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs |
title_short | Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs |
title_sort | low-power see hardening techniques and error rate evaluation in 65nm readout asics |
topic | Detectors and Experimental Techniques |
url | https://dx.doi.org/10.22323/1.370.0015 http://cds.cern.ch/record/2724952 |
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