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Investigation of Program Efficiency Overshoot in 3D Vertical Channel NAND Flash with Randomly Distributed Traps
The incremental step pulse programming slope (ISPP) with random variation was investigated by measuring numerous three−dimensional (3D) NAND flash memory cells with a vertical nanowire channel. We stored multiple bits in a cell with the ISPP scheme and read each cell pulse by pulse. The excessive tu...
Autores principales: | , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2023
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10180439/ https://www.ncbi.nlm.nih.gov/pubmed/37176997 http://dx.doi.org/10.3390/nano13091451 |
Sumario: | The incremental step pulse programming slope (ISPP) with random variation was investigated by measuring numerous three−dimensional (3D) NAND flash memory cells with a vertical nanowire channel. We stored multiple bits in a cell with the ISPP scheme and read each cell pulse by pulse. The excessive tunneling from the channel to the storage layer determines the program efficiency overshoot. Then, a broadening of the threshold voltage distribution was observed due to the abnormal program cells. To analyze the randomly varying abnormal program behavior itself, we distinguished between the read variation and over−programming in measurements. Using a 3D Monte−Carlo simulation, which is a probabilistic approach to solve randomness, we clarified the physical origins of over−programming that strongly influence the abnormal program cells in program step voltage, and randomly distributed the trap site in the nitride of a nanoscale 3D NAND string. These causes have concurrent effects, but we divided and analyzed them quantitatively. Our results reveal the origins of the variation and the overshoot in the ISPP, widening the threshold voltage distribution with traps randomly located at the nanoscale. The findings can enhance understanding of random over−programming and help mitigate the most problematic programming obstacles for multiple−bit techniques. |
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