Designing Highly Precise Overlay Targets for Asymmetric Sidewall Structures Using Quasi-Periodic Line Widths and Finite-Difference Time-Domain Simulation

The present study introduces an optimized overlay target design to minimize the overlay error caused by asymmetric sidewall structures in semiconductor manufacturing. To achieve this goal, the overlay error formula was derived by separating the asymmetric bottom grating structure into symmetric and asymmetric parts. Based on this formula, it was found that the overlay target design with the linewidth of the bottom grating closed to the grating period could effectively reduce the overlay error caused by the sidewall asymmetry structure. Simulation results demonstrate that the proposed design can effectively control the measurement error of different wavelengths within ±0.3 nm, even under varying sidewall angles and film thicknesses. Overall, the proposed overlay target design can significantly improve the overlay accuracy in semiconductor manufacturing processes.