Negative Design Margin Realization through Deep Path Activity Detection Combined with Dynamic Voltage Scaling in a 55 nm Near-Threshold 32-Bit Microcontroller

This paper presents an innovative approach for predicting timing errors tailored to near-/sub-threshold operations, addressing the energy-efficient requirements of digital circuits in applications, such as IoT devices and wearables. The method involves assessing deep path activity within an adjustab...

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Detalles Bibliográficos
Autores principales: Yu, Run-Ze, Li, Zhen-Hao, Deng, Xi, Liu, Zheng-Lin
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2023
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10490751/
https://www.ncbi.nlm.nih.gov/pubmed/37687954
http://dx.doi.org/10.3390/s23177498

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10490751/
https://www.ncbi.nlm.nih.gov/pubmed/37687954
http://dx.doi.org/10.3390/s23177498

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