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Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T–4R structure for high-density memory
Emerging data-intensive computation has driven the advanced packaging and vertical stacking of integrated circuits, for minimized latency and energy consumption. Yet a monolithic three-dimensional (3D) integrated structure with interleaved logic and high-density memory layers has been difficult to a...
| Autores principales: | , , , , , , , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
Nature Publishing Group UK
2023
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10517937/ https://www.ncbi.nlm.nih.gov/pubmed/37741834 http://dx.doi.org/10.1038/s41467-023-41736-2 |