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Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis

Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the dev...

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Autores principales: Roy, Avisek, Ta, Bao Q., Azadmehr, Mehdi, Aasmundtveit, Knut E.
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group UK 2023
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10625928/
https://www.ncbi.nlm.nih.gov/pubmed/37937184
http://dx.doi.org/10.1038/s41378-023-00598-w
_version_ 1785131234436841472
author Roy, Avisek
Ta, Bao Q.
Azadmehr, Mehdi
Aasmundtveit, Knut E.
author_facet Roy, Avisek
Ta, Bao Q.
Azadmehr, Mehdi
Aasmundtveit, Knut E.
author_sort Roy, Avisek
collection PubMed
description Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650–900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO(2) dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO(2) wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process.
format Online
Article
Text
id pubmed-10625928
institution National Center for Biotechnology Information
language English
publishDate 2023
publisher Nature Publishing Group UK
record_format MEDLINE/PubMed
spelling pubmed-106259282023-11-07 Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis Roy, Avisek Ta, Bao Q. Azadmehr, Mehdi Aasmundtveit, Knut E. Microsyst Nanoeng Article Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650–900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO(2) dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO(2) wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process. Nature Publishing Group UK 2023-11-06 /pmc/articles/PMC10625928/ /pubmed/37937184 http://dx.doi.org/10.1038/s41378-023-00598-w Text en © The Author(s) 2023 https://creativecommons.org/licenses/by/4.0/Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons license and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/ (https://creativecommons.org/licenses/by/4.0/) .
spellingShingle Article
Roy, Avisek
Ta, Bao Q.
Azadmehr, Mehdi
Aasmundtveit, Knut E.
Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
title Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
title_full Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
title_fullStr Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
title_full_unstemmed Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
title_short Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
title_sort post-cmos processing challenges and design developments of cmos-mems microheaters for local cnt synthesis
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10625928/
https://www.ncbi.nlm.nih.gov/pubmed/37937184
http://dx.doi.org/10.1038/s41378-023-00598-w
work_keys_str_mv AT royavisek postcmosprocessingchallengesanddesigndevelopmentsofcmosmemsmicroheatersforlocalcntsynthesis
AT tabaoq postcmosprocessingchallengesanddesigndevelopmentsofcmosmemsmicroheatersforlocalcntsynthesis
AT azadmehrmehdi postcmosprocessingchallengesanddesigndevelopmentsofcmosmemsmicroheatersforlocalcntsynthesis
AT aasmundtveitknute postcmosprocessingchallengesanddesigndevelopmentsofcmosmemsmicroheatersforlocalcntsynthesis