Integrated Logic Circuits Based on Wafer-Scale 2D-MoS(2) FETs Using Buried-Gate Structures

Two-dimensional (2D) transition-metal dichalcogenides (TMDs) materials, such as molybdenum disulfide (MoS(2)), stand out due to their atomically thin layered structure and exceptional electrical properties. Consequently, they could potentially become one of the main materials for future integrated high-performance logic circuits. However, the local back-gate-based MoS(2) transistors on a silicon substrate can lead to the degradation of electrical characteristics. This degradation is caused by the abnormal effect of gate sidewalls, leading to non-uniform field controllability. Therefore, the buried-gate-based MoS(2) transistors where the gate electrodes are embedded into the silicon substrate are fabricated. The several device parameters such as field-effect mobility, on/off current ratio, and breakdown voltage of gate dielectric are dramatically enhanced by field-effect mobility (from 0.166 to 1.08 cm(2)/V·s), on/off current ratio (from 4.90 × 10(5) to 1.52 × 10(7)), and breakdown voltage (from 15.73 to 27.48 V) compared with a local back-gate-based MoS(2) transistor, respectively. Integrated logic circuits, including inverters, NAND, NOR, AND, and OR gates, were successfully fabricated by 2-inch wafer-scale through the integration of a buried-gate MoS(2) transistor array.