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An FPGA-Based High-Performance Stateful Packet Processing Method
Compared to a stateless data plane, a stateful data plane offloads part of state information and control logic from a controller to a data plane to reduce communication overhead and improve packet processing efficiency. However, existing methods for implementing stateful data planes face challenges,...
| Autores principales: | , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
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MDPI
2023
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| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10673001/ https://www.ncbi.nlm.nih.gov/pubmed/38004932 http://dx.doi.org/10.3390/mi14112074 |