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Effect of ion implantation energy for the synthesis of Ge nanocrystals in SiN films with HfO(2)/SiO(2 )stack tunnel dielectrics for memory application
Ge nanocrystals (Ge-NCs) embedded in SiN dielectrics with HfO(2)/SiO(2 )stack tunnel dielectrics were synthesized by utilizing low-energy (≤5 keV) ion implantation method followed by conventional thermal annealing at 800°C, the key variable being Ge(+ )ion implantation energy. Two different energies...
Autores principales: | , , , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer
2011
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3211230/ https://www.ncbi.nlm.nih.gov/pubmed/21711708 http://dx.doi.org/10.1186/1556-276X-6-177 |
Sumario: | Ge nanocrystals (Ge-NCs) embedded in SiN dielectrics with HfO(2)/SiO(2 )stack tunnel dielectrics were synthesized by utilizing low-energy (≤5 keV) ion implantation method followed by conventional thermal annealing at 800°C, the key variable being Ge(+ )ion implantation energy. Two different energies (3 and 5 keV) have been chosen for the evolution of Ge-NCs, which have been found to possess significant changes in structural and chemical properties of the Ge(+)-implanted dielectric films, and well reflected in the charge storage properties of the Al/SiN/Ge-NC + SiN/HfO(2)/SiO(2)/Si metal-insulator-semiconductor (MIS) memory structures. No Ge-NC was detected with a lower implantation energy of 3 keV at a dose of 1.5 × 10(16 )cm(-2), whereas a well-defined 2D-array of nearly spherical and well-separated Ge-NCs within the SiN matrix was observed for the higher-energy-implanted (5 keV) sample for the same implanted dose. The MIS memory structures implanted with 5 keV exhibits better charge storage and retention characteristics compared to the low-energy-implanted sample, indicating that the charge storage is predominantly in Ge-NCs in the memory capacitor. A significant memory window of 3.95 V has been observed under the low operating voltage of ± 6 V with good retention properties, indicating the feasibility of these stack structures for low operating voltage, non-volatile memory devices. |
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