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Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers

In this paper, an optimal and robust design method to implement a two-chip out-of-plane microaccelerometer system is presented. The two-chip microsystem consists of a MEMS chip for sensing the external acceleration and a CMOS chip for signal processing. An optimized design method to determine the de...

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Autores principales: Lee, Sangmin, Ko, Hyoungho, Choi, Byoungdoo, Cho, Dong-il Dan
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Molecular Diversity Preservation International (MDPI) 2010
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3231064/
https://www.ncbi.nlm.nih.gov/pubmed/22163484
http://dx.doi.org/10.3390/s101210524
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author Lee, Sangmin
Ko, Hyoungho
Choi, Byoungdoo
Cho, Dong-il Dan
author_facet Lee, Sangmin
Ko, Hyoungho
Choi, Byoungdoo
Cho, Dong-il Dan
author_sort Lee, Sangmin
collection PubMed
description In this paper, an optimal and robust design method to implement a two-chip out-of-plane microaccelerometer system is presented. The two-chip microsystem consists of a MEMS chip for sensing the external acceleration and a CMOS chip for signal processing. An optimized design method to determine the device thickness, the sacrificial gap, and the vertical gap length of the M EMS sensing element is applied to minimize the fundamental noise level and also to achieve the robustness to the fabrication variations. In order to cancel out the offset and gain variations due to parasitic capacitances and process variations, a digitally trimmable architecture consisting of an 11 bit capacitor array is adopted in the analog front-end of the CMOS capacitive readout circuit. The out-of-plane microaccelerometer has the scale factor of 372 mV/g∼389 mV/g, the output nonlinearity of 0.43% FSO∼0.60% FSO, the input range of ±2 g and a bias instability of 122 μg∼229 μg. The signal-to-noise ratio and the noise equivalent resolution are measured to be 74.00 dB∼75.23 dB and 180 μg/rtHz∼190 μg/rtHz, respectively. The in-plane cross-axis sensitivities are measured to be 1.1%∼1.9% and 0.3%∼0.7% of the out-of-plane sensitivity, respectively. The results show that the optimal and robust design method for the MEMS sensing element and the highly trimmable capacity of the CMOS capacitive readout circuit are suitable to enhance the die-to-die uniformity of the packaged microsystem, without compromising the performance characteristics.
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spelling pubmed-32310642011-12-07 Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers Lee, Sangmin Ko, Hyoungho Choi, Byoungdoo Cho, Dong-il Dan Sensors (Basel) Article In this paper, an optimal and robust design method to implement a two-chip out-of-plane microaccelerometer system is presented. The two-chip microsystem consists of a MEMS chip for sensing the external acceleration and a CMOS chip for signal processing. An optimized design method to determine the device thickness, the sacrificial gap, and the vertical gap length of the M EMS sensing element is applied to minimize the fundamental noise level and also to achieve the robustness to the fabrication variations. In order to cancel out the offset and gain variations due to parasitic capacitances and process variations, a digitally trimmable architecture consisting of an 11 bit capacitor array is adopted in the analog front-end of the CMOS capacitive readout circuit. The out-of-plane microaccelerometer has the scale factor of 372 mV/g∼389 mV/g, the output nonlinearity of 0.43% FSO∼0.60% FSO, the input range of ±2 g and a bias instability of 122 μg∼229 μg. The signal-to-noise ratio and the noise equivalent resolution are measured to be 74.00 dB∼75.23 dB and 180 μg/rtHz∼190 μg/rtHz, respectively. The in-plane cross-axis sensitivities are measured to be 1.1%∼1.9% and 0.3%∼0.7% of the out-of-plane sensitivity, respectively. The results show that the optimal and robust design method for the MEMS sensing element and the highly trimmable capacity of the CMOS capacitive readout circuit are suitable to enhance the die-to-die uniformity of the packaged microsystem, without compromising the performance characteristics. Molecular Diversity Preservation International (MDPI) 2010-11-24 /pmc/articles/PMC3231064/ /pubmed/22163484 http://dx.doi.org/10.3390/s101210524 Text en © 2010 by the authors; licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution license (http://creativecommons.org/licenses/by/3.0/).
spellingShingle Article
Lee, Sangmin
Ko, Hyoungho
Choi, Byoungdoo
Cho, Dong-il Dan
Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers
title Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers
title_full Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers
title_fullStr Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers
title_full_unstemmed Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers
title_short Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers
title_sort optimal and robust design method for two-chip out-of-plane microaccelerometers
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3231064/
https://www.ncbi.nlm.nih.gov/pubmed/22163484
http://dx.doi.org/10.3390/s101210524
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