A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50...

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Detalles Bibliográficos
Autores principales: Chen, Min-Cheng, Chen, Hao-Yu, Lin, Chia-Yi, Chien, Chao-Hsin, Hsieh, Tsung-Fan, Horng, Jim-Tong, Qiu, Jian-Tai, Huang, Chien-Chao, Ho, Chia-Hua, Yang, Fu-Liang
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Molecular Diversity Preservation International (MDPI) 2012
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3355393/
https://www.ncbi.nlm.nih.gov/pubmed/22666012
http://dx.doi.org/10.3390/s120403952

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3355393/
https://www.ncbi.nlm.nih.gov/pubmed/22666012
http://dx.doi.org/10.3390/s120403952

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