Cargando…
Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference
This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (...
Autores principales: | , , , , , |
---|---|
Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Molecular Diversity Preservation International (MDPI)
2013
|
Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3892812/ https://www.ncbi.nlm.nih.gov/pubmed/24351635 http://dx.doi.org/10.3390/s131217265 |
_version_ | 1782299586874834944 |
---|---|
author | Boufouss, El Hafed Francis, Laurent A. Kilchytska, Valeriya Gérard, Pierre Simon, Pascal Flandre, Denis |
author_facet | Boufouss, El Hafed Francis, Laurent A. Kilchytska, Valeriya Gérard, Pierre Simon, Pascal Flandre, Denis |
author_sort | Boufouss, El Hafed |
collection | PubMed |
description | This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of −40–200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm(2). |
format | Online Article Text |
id | pubmed-3892812 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2013 |
publisher | Molecular Diversity Preservation International (MDPI) |
record_format | MEDLINE/PubMed |
spelling | pubmed-38928122014-01-16 Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference Boufouss, El Hafed Francis, Laurent A. Kilchytska, Valeriya Gérard, Pierre Simon, Pascal Flandre, Denis Sensors (Basel) Article This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of −40–200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm(2). Molecular Diversity Preservation International (MDPI) 2013-12-13 /pmc/articles/PMC3892812/ /pubmed/24351635 http://dx.doi.org/10.3390/s131217265 Text en © 2013 by the authors; licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution license (http://creativecommons.org/licenses/by/3.0/). |
spellingShingle | Article Boufouss, El Hafed Francis, Laurent A. Kilchytska, Valeriya Gérard, Pierre Simon, Pascal Flandre, Denis Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference |
title | Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference |
title_full | Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference |
title_fullStr | Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference |
title_full_unstemmed | Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference |
title_short | Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference |
title_sort | ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (cmos) silicon-on-insulator (soi) voltage reference |
topic | Article |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3892812/ https://www.ncbi.nlm.nih.gov/pubmed/24351635 http://dx.doi.org/10.3390/s131217265 |
work_keys_str_mv | AT boufousselhafed ultralowpowerhightemperatureandradiationhardcomplementarymetaloxidesemiconductorcmossilicononinsulatorsoivoltagereference AT francislaurenta ultralowpowerhightemperatureandradiationhardcomplementarymetaloxidesemiconductorcmossilicononinsulatorsoivoltagereference AT kilchytskavaleriya ultralowpowerhightemperatureandradiationhardcomplementarymetaloxidesemiconductorcmossilicononinsulatorsoivoltagereference AT gerardpierre ultralowpowerhightemperatureandradiationhardcomplementarymetaloxidesemiconductorcmossilicononinsulatorsoivoltagereference AT simonpascal ultralowpowerhightemperatureandradiationhardcomplementarymetaloxidesemiconductorcmossilicononinsulatorsoivoltagereference AT flandredenis ultralowpowerhightemperatureandradiationhardcomplementarymetaloxidesemiconductorcmossilicononinsulatorsoivoltagereference |