Investigation of a Novel Common Subexpression Elimination Method for Low Power and Area Efficient DCT Architecture

A wide interest has been observed to find a low power and area efficient hardware design of discrete cosine transform (DCT) algorithm. This research work proposed a novel Common Subexpression Elimination (CSE) based pipelined architecture for DCT, aimed at reproducing the cost metrics of power and a...

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Detalles Bibliográficos
Autores principales: Siddiqui, M. F., Reza, A. W., Kanesan, J., Ramiah, H.
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Hindawi Publishing Corporation 2014
Materias:
Research Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4124737/
https://www.ncbi.nlm.nih.gov/pubmed/25133249
http://dx.doi.org/10.1155/2014/620868

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4124737/
https://www.ncbi.nlm.nih.gov/pubmed/25133249
http://dx.doi.org/10.1155/2014/620868

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