Coexistence of memory resistance and memory capacitance in TiO(2) solid-state devices

This work exploits the coexistence of both resistance and capacitance memory effects in TiO(2)-based two-terminal cells. Our Pt/TiO(2)/TiO( x )/Pt devices exhibit an interesting combination of hysteresis and non-zero crossing in their current-voltage (I-V) characteristic that indicates the presence of capacitive states. Our experimental results demonstrate that both resistance and capacitance states can be simultaneously set via either voltage cycling and/or voltage pulses. We argue that these state modulations occur due to bias-induced reduction of the TiO( x ) active layer via the displacement of ionic species.