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Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process
The cross-coupled circuit mechanism based dynamic latch comparator is presented in this research. The comparator is designed using differential input stages with regenerative S-R latch to achieve lower offset, lower power, higher speed and higher resolution. In order to decrease circuit complexity,...
| Autores principales: | , , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
Public Library of Science
2014
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4191981/ https://www.ncbi.nlm.nih.gov/pubmed/25299266 http://dx.doi.org/10.1371/journal.pone.0108634 |