Break-before-Make CMOS Inverter for Power-Efficient Delay Implementation

A modified static CMOS inverter with two inputs and two outputs is proposed to reduce short-circuit current in order to increment delay and reduce power overhead where slow operation is required. The circuit is based on bidirectional delay element connected in series with the PMOS and NMOS switching...

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Detalles Bibliográficos
Autores principales: Puhan, Janez, Raič, Dušan, Tuma, Tadej, Bűrmen, Árpád
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Hindawi Publishing Corporation 2014
Materias:
Research Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4265520/
https://www.ncbi.nlm.nih.gov/pubmed/25538951
http://dx.doi.org/10.1155/2014/349131

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4265520/
https://www.ncbi.nlm.nih.gov/pubmed/25538951
http://dx.doi.org/10.1155/2014/349131

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